loop filter
英 [luːp ˈfɪltə(r)]
美 [luːp ˈfɪltər]
网络 环路滤波; 环路滤波器; 回路滤波器; 滤波器; 环形滤波器
双语例句
- With regard to extending the upper limit for dynamic range of seismometer, the merits and demerits of the loop filter are discussed.
本文探讨了一阶极点高通、一阶极点低通、一阶零点高通、双一阶和零阶环路滤波在扩展地震计动态范围上限方面的优缺点。 - On condition that the open-loop parameters are given, the loop filter of feedback seismometer with a velocity transducer is one of the key factors of effecting seismometer main technical performances.
在开环参数一定的条件下，速度传感反馈地震计中的环路滤波是影响地震计主要技术指标的关键环节之一。 - At last, the loop filter is also analyzed and contrived taking account of effection of additional phase shift by the sampling-holder.
考虑到取样保持器的附加相移影响，对环路滤波器进行了分析和设计。 - The loop filter is run after decoding or encoding a frame and serves to perform extra processing on a frame, usually to remove blockiness in DCT-based video formats.
回放过滤器在解码或编码一个帧后运行，在帧上执行一些额外的处理，在基于DCT的格式中通常是消除区块效应。 - Design and Implementation of Intra Prediction and Loop Filter in AVS Video Decoder
AVS解码器帧内预测和环路滤波器硬件设计与实现 - Analysis of the Magnitude Frequency Responses of Software Phase-Locked Loop and Its Loop Filter
软件锁相环环路滤波器和闭环幅频响应分析 - Based on the second order PLL, which uses a first order RC filter as loop filter, the characteristic of dynamic tracking of PLL and its influence on the accuracy of synchronized measurement are analyzed and simulated.
以常用2阶PLL（使用1阶RC无源环路滤波器）为基础，作者首次就PLL的动态跟踪特性及其对同步测量精度的影响问题进行了详细的分析和仿真。 - According to the reference [ 2], the paper presents a new loop filter in the new structure.
本文根据卡尔曼滤波器[2]在快速跟踪中的优良表现，在新的位同步器中设计了新的环路滤波器。 - This paper discusses the design of phase-locking frequency synthesis oscillator with low phase noise, and analyses and discusses the main causes for its phase noise such as loop filter, frequency divider, phase discriminator and voltage control oscillator ( VCO).
主要讨论了低相位噪声微波锁相频率合成器的设计，并对影响其相位噪声的主要因素如环路滤波器、分频器、鉴相器及压控振荡器（VCO）分别作了分析和讨论； - The key of the FSK design is the calculation, simulation and optimization of the charge pump PLL chip, VCO and loop filter.
FSK电路关键是电荷泵PLL芯片、VCO电路和环路滤波器的参数计算和仿真优化。 - The timing recovery in this paper is composed of interpolation, timing error detector, loop filter and numerically controlled oscillator.
本文设计的定时恢复结构包括插值器、定时误差检测器、环路滤波器和数控振荡器四部分。 - An implicit dual-path loop filter is proposed, which is driven by a single charge pump.
提出了一种隐式双路径环路滤波器结构。该结构克服了传统双路径滤波器需要两个电荷泵的缺点。 - This paper discusses an all digital phase-locked loop with a zero-crossing detector and a loop filter.
本文讨论的全数字锁相环包括过零检测器和环路滤波器。 - In this systems, loop filter is RC integral filter and phase-detector is triangle phase-detector characteristic.
系统中的环路滤波器采用RC积分滤波器，鉴相器采用三角形鉴相特性； - The method of designing the loop filter with the phase margin and loop bandwidth is displayed.
并提出了从环路带宽和相位余量出发设计环路滤波器的方法。 - Design of Frequency Synthesizer's Loop Filter
频率合成器环路滤波器的设计 - In order to meet the low power requirement, the feedforward architecture and active-passive hybrid loop filter are chosen. Moreover, the power-hungry summing block before the quantizer is omitted.
针对低功耗要求，采用了前馈的系统架构，使用了有源和无源积分器相结合的环路滤波器，并省去了量化器前的求和器以节省功耗。 - First, the scheme of the phase noise measurement is briefly introduced and the phase demodulation method is used in this system. And then the digital design technique of the loop filter and the frequency difference elimination algorithm are introduced in detail.
首先简要介绍了鉴相法测试相位噪声系统的实现方案，然后重点介绍了鉴相法中环路滤波器的数字实现技术和相位噪声提取算法。 - Observed quantity can be conversed by the output of loop filter, and the expressions are derived.
通过研究，观测量可以从载波跟踪环路滤波器的输出量换算得到，并给出了计算公式。 - First modular design the three-phase phase lock loop, which realizes functions of the phase discriminator, loop filter and NCO. With the top connections finished, the whole three-phase PLL design has completed.
首先对三相锁相环进行模块化设计，然后分别实现了鉴相器、环路滤波器和数控振荡器的功能，最后经过顶层连接，完成了整个三相锁相环的设计。 - Afterwards, the design process of this project is described in detail, including the analysis and design of the phase/ frequency detector, change pump, loop filter and voltage controlled oscillator, as well as the whole circuit system.
接着论文详细讲述了电路的设计过程，包括鉴频鉴相器、电荷泵、环路滤波器、压控振荡器等电路模块的分析和设计。然后对环路的各项参数进行了详细的推导。 - The phase-locked loop principle and composition have been analysis in chapter 3 and 4, and the loop filter design and selection have been studied.
在第三章和第四章较详细地分析了锁相环的原理及组成，并对环路滤波器的设计和选择进行了研究，对相位噪声的抑制和杂散的优化进行了比较深入的分析。 - These key points are the selection and placement of the capacitor and choke inductor near the power pin of chip, the design and simulation of the loop filter in the local oscillator module, the selection of reference source in PLL ( Phase-locked loop).
接下来对每个模块中电路设计的关键点做了说明，如芯片电源引脚处滤波电容和扼流电感的选择和放置、本振模块中环路滤波器的设计和仿真、锁相环参考源的选取等。 - This article describes the phase-locked loop PLL circuit design and application, including working principle and PLL circuits, PLL circuit transmission characteristics, PLL loop filter circuit design, PLL frequency of DDS technology and features to improve the synthesis.
本文介绍了锁相环PLL电路的设计与应用，内容包括PLL工作原理与电路构成，PLL电路的传输特性，PLL电路中环路滤波器的设计方法，PLL特性改善技术及频率DDS合成技术。 - This chapter first analyzed the filter determining conditions in loop filter algorithm.
本章首先对环路滤算法中的滤波条件判定进行了分析。 - The effects of PFD, charge pump, loop filter on the noise and jitter characteristics of PLL loop are in detail taken into account during circuit design.
在电路设计方面，充分考虑了鉴频鉴相器、电荷泵、环路滤波器对整体锁相环环路的噪声和抖动特性的影响。 - Using PI control principle, realize the loop filter, set parameters according to actual conditions.
然后运用PI控制原理，实现环路滤波，根据实际情况设定参数。 - In addition, the paper on the interpolation controller and the loop filter had been described, and then completed of the design of the symbol synchronization.
另外，论文对插值控制器和环路滤波做了介绍，最终完成整个符号同步设计。 - Then the paper studied focus on the inverse quantization and loop filter module principle, and the C code for the design and optimized.
然后本文重点对AVS解码中反量化和环路滤波模块的原理进行了研究，并对其C代码进行了设计，起初，写的C代码有些繁琐，所以后面对其C代码又进行了优化。 - Then we make some efforts to discuss the timing recovery scheme which is composed of interpolator, timing error detector, loop filter and numerically controlled oscillator and do the simulation of the scheme.
对于定时恢复的各个部分：内插器、定时误差检测器、环路滤波器和数控振荡器进行了详细阐述，并进行了定时环路的仿真。